March 20 2025 # Benchmarks Given the outsized role NVIDIA plays in the chip industry, any benchmarks take into consider how they frame and publish their performance numbers. Semi Analysis laid out 3 rules of Jensen Math in their NVIDA GTC 2025 review: [NVIDIA GTC 2025 – Built For Reasoning, Vera Rubin, Kyber, CPO, Dynamo Inference, Jensen Math, Feynman](https://semianalysis.com/2025/03/19/nvidia-gtc-2025-built-for-reasoning-vera-rubin-kyber-cpo-dynamo-inference-jensen-math-feynman/) 1. FLOPs are quoted with 2:4 sparsity (which no one uses) versus dense FLOPs, which is the real world performance metric – meaning the 989.4 TFLOPs of FP16 in for the H100 is quoted as 1979.81 TFLOPs 2. Bandwidth should be quoted in bidirectional terms. NVLink5 is quoted as 1.8TB/s because it is 900GB/s of transmit plus 900GB/s of receive. These are added together for the spec sheet, but in the networking world, the standard is to quote the unidirectional bandwidth. 3. GPU counts are counted in terms of GPU dies in a package rather than the number of packages. This nomenclature will be adopted from Rubin onwards. The first generation Vera Rubin racks will be called NVL144, even though the system architecture is similar to the GB200 NVL72 with the same Oberon rack and 72 GPU packages. # Optimizations ## Sparsity [https://pytorch.org/blog/accelerating-neural-network-training/](https://pytorch.org/blog/accelerating-neural-network-training/) Basic idea is to skip calculations involving zero-valued tensor elements to speed up matrix multiplication by replacing dense kernels with sparse kernels that bypass calculations with pruned elements.